struct i2c_adapter描述了MPU的I2C外设。
struct i2c_adapter { struct module *owner; unsigned int class; /* classes to allow probing for */ const struct i2c_algorithm *algo; /* the algorithm to access the bus */ void *algo_data; /* data fields that are valid for all devices */ struct rt_mutex bus_lock; int timeout; /* in jiffies */ /* 传输数据时失败后的重试次数 */ int retries; struct device dev; /* the adapter device */ int nr; /* 适配器名字 */ char name[48]; struct completion dev_released; struct mutex userspace_clients_lock; struct list_head userspace_clients; struct i2c_bus_recovery_info *bus_recovery_info; const struct i2c_adapter_quirks *quirks; };struct i2c_algorithm提供了一套通信方法，作为I2C适配器和设备之间的通讯方法。
struct i2c_algorithm { /* 通讯函数 */ int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data); /* 返回支持的功能 */ u32 (*functionality) (struct i2c_adapter *); #if IS_ENABLED(CONFIG_I2C_SLAVE) int (*reg_slave)(struct i2c_client *client); int (*unreg_slave)(struct i2c_client *client); #endif }总线驱动私有结构体。
struct imx_i2c_struct { /* 适配器 */ struct i2c_adapter adapter; /* 时钟 */ struct clk *clk; /* IO地址 */ void __iomem *base; /* 等待队列头 */ wait_queue_head_t queue; unsigned long i2csr; unsigned int disable_delay; int stopped; unsigned int ifdr; /* IMX_I2C_IFDR */ unsigned int cur_clk; /* bit速率 */ unsigned int bitrate; const struct imx_i2c_hwdata *hwdata; struct imx_i2c_dma *dma; };描述了DMA属性。
struct imx_i2c_dma { struct dma_chan *chan_tx; struct dma_chan *chan_rx; struct dma_chan *chan_using; struct completion cmd_complete; dma_addr_t dma_buf; unsigned int dma_len; enum dma_transfer_direction dma_transfer_dir; enum dma_data_direction dma_data_dir; };I2C消息结构体，描述了一条I2C消息，包括数据和长度。
struct i2c_msg { __u16 addr; /* slave address */ __u16 flags; #define I2C_M_TEN 0x0010 /* this is a ten bit chip address */ #define I2C_M_RD 0x0001 /* read data, from slave to master */ #define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_NOSTART */ #define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */ __u16 len; /* msg length */ __u8 *buf; /* pointer to msg data */ }；在驱动加载和卸载的时候执行。
static int __init i2c_adap_imx_init(void) { return platform_driver_register(&i2c_imx_driver); } subsys_initcall(i2c_adap_imx_init); static void __exit i2c_adap_imx_exit(void) { platform_driver_unregister(&i2c_imx_driver); } module_exit(i2c_adap_imx_exit)probe函数在device和driver匹配上的时候执行，主要负责申请驱动需要的内存、中断等资源，初始化驱动相关结构体成员，最后将adapter添加到系统中。
static int i2c_imx_probe(struct platform_device *pdev) { const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids, &pdev->dev); struct imx_i2c_struct *i2c_imx; struct resource *res; struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev); void __iomem *base; int irq, ret; dma_addr_t phy_addr; dev_dbg(&pdev->dev, "<%s>\n", __func__); /* 获取中断号 */ irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "can't get irq number\n"); return irq; } /* 获取资源 */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); /* IO资源映射 */ base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(base)) return PTR_ERR(base); /* 寄存器首地址 */ phy_addr = (dma_addr_t)res->start; i2c_imx = devm_kzalloc(&pdev->dev, sizeof(*i2c_imx), GFP_KERNEL); if (!i2c_imx) return -ENOMEM; if (of_id) i2c_imx->hwdata = of_id->data; else i2c_imx->hwdata = (struct imx_i2c_hwdata *) platform_get_device_id(pdev)->driver_data; /* Setup i2c_imx driver structure */ strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); i2c_imx->adapter.owner = THIS_MODULE; i2c_imx->adapter.algo = &i2c_imx_algo; i2c_imx->adapter.dev.parent = &pdev->dev; i2c_imx->adapter.nr = pdev->id; i2c_imx->adapter.dev.of_node = pdev->dev.of_node; i2c_imx->base = base; /* Get I2C clock */ i2c_imx->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(i2c_imx->clk)) { dev_err(&pdev->dev, "can't get I2C clock\n"); return PTR_ERR(i2c_imx->clk); } /* 使能时钟 */ ret = clk_prepare_enable(i2c_imx->clk); if (ret) { dev_err(&pdev->dev, "can't enable I2C clock\n"); return ret; } /* Request IRQ */ ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, IRQF_NO_SUSPEND, pdev->name, i2c_imx); if (ret) { dev_err(&pdev->dev, "can't claim irq %d\n", irq); goto clk_disable; } /* Init queue */ init_waitqueue_head(&i2c_imx->queue); /* Set up adapter data */ i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); /* Set up clock divider */ i2c_imx->bitrate = IMX_I2C_BIT_RATE; /* 获取设备树中时钟频率 */ ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", &i2c_imx->bitrate); if (ret < 0 && pdata && pdata->bitrate) i2c_imx->bitrate = pdata->bitrate; /* Set up chip registers to defaults */ imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR); imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); /* Add I2C adapter */ ret = i2c_add_numbered_adapter(&i2c_imx->adapter); if (ret < 0) { dev_err(&pdev->dev, "registration failed\n"); goto clk_disable; } /* Set up platform driver data */ platform_set_drvdata(pdev, i2c_imx); clk_disable_unprepare(i2c_imx->clk); /* Init DMA config if supported */ i2c_imx_dma_request(i2c_imx, phy_addr); return 0; /* Return OK */ clk_disable: clk_disable_unprepare(i2c_imx->clk); return ret; }负责I2C数据的读取和写入。
static int i2c_imx_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) { unsigned int i, temp; int result; bool is_lastmsg = false; struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); /* Start I2C transfer */ result = i2c_imx_start(i2c_imx); if (result) goto fail0; /* read/write data */ for (i = 0; i < num; i++) { if (i == num - 1) is_lastmsg = true; if (i) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp |= I2CR_RSTA; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); result = i2c_imx_bus_busy(i2c_imx, 1); if (result) goto fail0; } /* write/read data */ if (msgs[i].flags & I2C_M_RD)// 为读 result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg); else {// 为写 if (i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD)// 使用DMA写 result = i2c_imx_dma_write(i2c_imx, &msgs[i]); else// 不使用DMA写 result = i2c_imx_write(i2c_imx, &msgs[i]); } if (result) goto fail0; } fail0: /* Stop I2C transfer */ i2c_imx_stop(i2c_imx); return (result < 0) ? result : num; }被xfer调用，用来向I2C适配器读写数据。
static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) { int i, result; /* write slave address */ imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR); result = i2c_imx_trx_complete(i2c_imx); if (result) return result; result = i2c_imx_acked(i2c_imx); if (result) return result; /* write data */ for (i = 0; i < msgs->len; i++) { imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR); result = i2c_imx_trx_complete(i2c_imx); if (result) return result; result = i2c_imx_acked(i2c_imx); if (result) return result; } return 0; } static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bool is_lastmsg) { int i, result; unsigned int temp; int block_data = msgs->flags & I2C_M_RECV_LEN; /* write slave address */ imx_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_imx, IMX_I2C_I2DR); result = i2c_imx_trx_complete(i2c_imx); if (result) return result; result = i2c_imx_acked(i2c_imx); if (result) return result; /* setup bus to read data */ temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp &= ~I2CR_MTX; if ((msgs->len - 1) || block_data) temp &= ~I2CR_TXAK; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */ if (i2c_imx->dma && msgs->len >= DMA_THRESHOLD && !block_data) return i2c_imx_dma_read(i2c_imx, msgs, is_lastmsg); /* read data */ for (i = 0; i < msgs->len; i++) { u8 len = 0; result = i2c_imx_trx_complete(i2c_imx); if (result) return result; if ((!i) && block_data) { len = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) return -EPROTO; msgs->len += len; } if (i == (msgs->len - 1)) { if (is_lastmsg) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp &= ~(I2CR_MSTA | I2CR_MTX); imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_bus_busy(i2c_imx, 0); i2c_imx->stopped = 1; } else { temp = readb(i2c_imx->base + IMX_I2C_I2CR); temp |= I2CR_MTX; writeb(temp, i2c_imx->base + IMX_I2C_I2CR); } } else if (i == (msgs->len - 2)) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp |= I2CR_TXAK; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); } if ((!i) && block_data) msgs->buf[0] = len; else msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); } return 0; }被xfer调用，用来向I2C适配器读写数据。
static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) { int result; unsigned long time_left; unsigned int temp = 0; unsigned long orig_jiffies = jiffies; struct imx_i2c_dma *dma = i2c_imx->dma; struct device *dev = &i2c_imx->adapter.dev; dma->chan_using = dma->chan_tx; dma->dma_transfer_dir = DMA_MEM_TO_DEV; dma->dma_data_dir = DMA_TO_DEVICE; dma->dma_len = msgs->len - 1; result = i2c_imx_dma_xfer(i2c_imx, msgs); if (result) return result; temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp |= I2CR_DMAEN; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR); reinit_completion(&i2c_imx->dma->cmd_complete); time_left = wait_for_completion_timeout( &i2c_imx->dma->cmd_complete, msecs_to_jiffies(DMA_TIMEOUT)); if (time_left == 0) { dmaengine_terminate_all(dma->chan_using); return -ETIMEDOUT; } /* Waiting for transfer complete. */ while (1) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); if (temp & I2SR_ICF) break; if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(DMA_TIMEOUT))) { return -ETIMEDOUT; } schedule(); } temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp &= ~I2CR_DMAEN; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); /* The last data byte must be transferred by the CPU. */ imx_i2c_write_reg(msgs->buf[msgs->len-1], i2c_imx, IMX_I2C_I2DR); result = i2c_imx_trx_complete(i2c_imx); if (result) return result; return i2c_imx_acked(i2c_imx); } static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bool is_lastmsg) { int result; unsigned long time_left; unsigned int temp; unsigned long orig_jiffies = jiffies; struct imx_i2c_dma *dma = i2c_imx->dma; struct device *dev = &i2c_imx->adapter.dev; temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp |= I2CR_DMAEN; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); dma->chan_using = dma->chan_rx; dma->dma_transfer_dir = DMA_DEV_TO_MEM; dma->dma_data_dir = DMA_FROM_DEVICE; /* The last two data bytes must be transferred by the CPU. */ dma->dma_len = msgs->len - 2; result = i2c_imx_dma_xfer(i2c_imx, msgs); if (result) return result; reinit_completion(&i2c_imx->dma->cmd_complete); time_left = wait_for_completion_timeout( &i2c_imx->dma->cmd_complete, msecs_to_jiffies(DMA_TIMEOUT)); if (time_left == 0) { dmaengine_terminate_all(dma->chan_using); return -ETIMEDOUT; } /* waiting for transfer complete. */ while (1) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); if (temp & I2SR_ICF) break; if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(DMA_TIMEOUT))) { return -ETIMEDOUT; } schedule(); } temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp &= ~I2CR_DMAEN; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); /* read n-1 byte data */ temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp |= I2CR_TXAK; imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); msgs->buf[msgs->len-2] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* read n byte data */ result = i2c_imx_trx_complete(i2c_imx); if (result) return result; if (is_lastmsg) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); temp &= ~(I2CR_MSTA | I2CR_MTX); imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_bus_busy(i2c_imx, 0); i2c_imx->stopped = 1; } else { temp = readb(i2c_imx->base + IMX_I2C_I2CR); temp |= I2CR_MTX; writeb(temp, i2c_imx->base + IMX_I2C_I2CR); } msgs->buf[msgs->len-1] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); return 0; }